A Highly Power- and Area-Efficient PMU for Cell-Size Autonomous Microsystems

Bookmark (0)
Please login to bookmark Close

Power Management Units (PMU) are present in most electronic devices today. However, for power and area constrained applications, their design becomes a real challenge, especially when cell-sized autonomous microsystems are targeted. This paper presents an LDO regulator and a voltage reference, which are usually a must in any PMU, for autonomous microsystems fabricated in 65 nm CMOS technology. This PMU has been designed to minimize quiescent power and area, consuming a minimum power of 15.6 nW and occupying only 391 μm2 , while being able to deliver up to 40 μA to the load. No significant degradation was observed, as the measured line regulation is 0.173%/V, the temperature coefficient is 128.4 ppm/ ∘ C over a very wide temperature range going from 0 ∘ C up to 120 ∘ C, and the PSR at low frequencies is − 67.1 dB.

​Power Management Units (PMU) are present in most electronic devices today. However, for power and area constrained applications, their design becomes a real challenge, especially when cell-sized autonomous microsystems are targeted. This paper presents an LDO regulator and a voltage reference, which are usually a must in any PMU, for autonomous microsystems fabricated in 65 nm CMOS technology. This PMU has been designed to minimize quiescent power and area, consuming a minimum power of 15.6 nW and occupying only 391 μm2 , while being able to deliver up to 40 μA to the load. No significant degradation was observed, as the measured line regulation is 0.173%/V, the temperature coefficient is 128.4 ppm/ ∘ C over a very wide temperature range going from 0 ∘ C up to 120 ∘ C, and the PSR at low frequencies is − 67.1 dB. Read More